This describes a simple implementation of a logic monitor using a PICAXE-08M. The design consists of a programmed PICAXE-08M, a 22K series limiting resistor and an LED with the associated 330 Ohm resistor.
I am forever reading of the frustrations of hobbyists who are unable to download programs to their PICAXE. With no tools such as a DVM, scope or logic probe, about the best one can do is to eyeball the circuit, and if the error is not found, rebuild it and perhaps stare at it for days before throwing everything in the junk box with a grumbled, "damn PICAXE". Actually, the problem is not restricted to the PICAXE. I see it with the Parallax Basic Stamp and the NetMedia BX24. And, of course, I see it with my students, at least for a few weeks, when they see that developing a debugging strategy is very much a part of the product design.
Usually, one cannot simply place an LED on a point in the circuit as there is not sufficient drive to light the LED, the LED will simply load the circuit, or a pulse is too short for the eye to see the event.
The idea of this design is to dedicate a programmed PICAXE-08M as a logic monitor. That is, program a PICAXE-08M with the code shown below and then use this programmed PICAXE as a standalone logic monitor right on the same protoboard you are using for your current project. (You may well find that you can improve on my code.)
The design uses an input to a PICAXE-08M to continually monitor the desired point in the circuit and set an output LED to the appropriate state, either on or off. If the state changes on the input, the LED "twinkles". That is, a series of rapid flashes.
This permits the user to place the probe wire at a point in the circuit under test and observe if the point is behaving properly. For example, if one is having trouble downloading to a PICAXE-18X, one might probe terminal 3 of the serial connector (PC TxD). This should normally be at a logic zero. When a download begins, this goes high and then again low. Thus, using the monitor, one should see the LED is off, and if the COM Port is working and the cable is integral, that the LED goes on when a download is attempted and then returns to off. If the point remains low during the download sequence, you might then suspect there is something wrong with the cable or the COM port.
You might then move to terminal 3 (SerIn) of the PICAXE-18X and observe much the same thing. If not, there is a wiring problem between term 3 of the COM port connector and term 3 of the PICAXE-18X.
Normally, the PICAXE-18X SerOut on terminal 2 is low. When downloading to PICAXE, the PC brings terminal 3 high and the PICAXE transmits some info to the PC on SerOut, Thus, using the monitor, one should normally see a logic zero on terminal 2 of the PICAXE-18X. When downloading, this point should pulse (monitor LED "twinkles") for a brief period of time. This might then be repeated by monitoring the PC COM Port (RxD on terminal 2).
The utility of the stand alone logic monitor clearly extends beyond simply debugging the downloading to a PICAXE. Although, if it saves but a half hour of pulling hair, debugging a download circuit, it is well worth the investment.
Assume you are interfacing a PICAXE-18X with a Microchip MCP3208 eight 12-bit A/D converter using the SPI protocol and the design is not working. You might probe the power and ground terminals of the MCP3208 to assure +5 VDC and GRD are present. Then probe the /CS lead which should normally be high and goes to a logic zero when data is being transferred and then back to a logic one. This will probably be so fast that the probe LED will simply twinkle. Then probe the clock (SCK) and master out - slave in (MOSI) leads to assure the master is talking to the slave MCP3208. Finally, probe master in - slave out (MISO) to verify the slave is sending data to the master. In all cases, these should be short twinkles.
Another example is the use of the I2C protocol, say in interfacing with a 24LC256 EEPROM. First, you might probe power and GRD on the 24LC256. Then probe the A2, A1 and A0 to assure the EEPROM address is properly set. Finally, with the I2C routine running, probe the SCL and SDA leads. When idle, these should be high (monitor LED off). When data is transferred, the monitor LED should "twinkle".
Of course, this little logic monitor will not solve your problems for you. Rather, it is an additional tool that helps to finds "stuck at zero" and "stuck at one" faults and it permits you to verify if there is activity on a lead. But, of course, it can't tell you if the activity on the lead is the correct. That's why God gave us imaginations.
This logic monitor design does not measure voltage and thus really cannot establish the actual voltage level of a logic one. Rather, if the monitor LED is on, the probed point at a voltage level which appears to be logic one to the PICAXE-08M associated with the logic monitor. Further, the logic monitor really is not of much use in debugging problems associated with noise when controlling heavy or inductive loads such as motors and relays.
The function of the series 22K resistor on the monitor's input permits you to probe points which are in the range of -12 to +12 VDC. This is very important if you are probing terminal 3 of the PC serial connector as the idle condition is probably near -8 VDC which swings to + 8 VDC. If the series limiting resistor is not included, these levels will probably burn out the PICAXE-08M used to implement the monitor.
' Program LOGIC.Bas - PICAXE-08M ' ' A very simple implementation of a standalone logic monitor using the inexpensive PICAXE-08M ' ' Continually monitors Pin2 (term 5) and sets output LED on Pin1 (term 6) to the same ' state. If there is a state change, the output LED "twinkles" two times. ' ' Thus, if a point is at a hard logic one, the LED will be on. If, at logic zero, the LED ' will be off. If the state is changing, the LED will "twinkle". ' ' PICAXE-08M ' ' Probe Wire ------------ 22K -------- Pin2 (term 5) LED ' Pin1 (term 6) --- 330 -->|-- GRD ' ' Note that term 2 of the PICAXE-08M must be grounded. ' ' +5 VDC power to term 1 and GRD to terminal 8. ' ' copyright, Peter H Anderson, Baltimore, MD, Oct, '04 TOP: Branch Pin2, (Logic0, Logic1) Logic0: Low 1 SetInt %00000100, %00000100 ' if it goes high Goto TOP Logic1: High 1 SetInt %00000100, %00000000 ' if it goes low Goto TOP Interrupt: High 1 Pause 25 Low 1 Pause 25 High 1 Pause 25 Low 1 Pause 25 Return