// defs_1840.h
//
// header file for PIC12F1840, 4096 words
//
// copyright, Peter H. Anderson, Baltimore, MD, Jun, 11

#define byte int

#define W 0
#define F 1

// register files
#byte INDF0     =0x00
#byte INDF1     =0x01
#byte PCL       =0x02
#byte STATUS    =0x03
#byte FSR0L     =0x04
#byte FSR0H     =0x05
#byte FSR1L     =0x06
#byte FSR1H     =0x07
#byte BSR       =0x08
#byte WREG      =0x09

#byte PCLATH    =0x0a
#byte INTCON    =0x0b

#byte PORTA   	=0x0C

#byte PIR1   	=0x11
#byte PIR2   	=0x12

#byte TMR0   	=0x15
#byte TMR1L   	=0x16
#byte TMR1H   	=0x17
#byte T1CON   	=0x18
#byte T1GCON   	=0x19
#byte TMR2   	=0x1A
#byte PR2   	=0x1B
#byte T2CON   	=0x1C

#byte CPSCON0   =0x1E
#byte CPSCON1   =0x1F

#byte TRISA 	=0x8C

#byte PIE1   	=0x91
#byte PIE2   	=0x92

#byte OPTION_REG =0x95
#byte PCON   	=0x96
#byte WDTCON  	=0x97
#byte OSCTUNE   =0x98
#byte OSCCON   	=0x99
#byte OSCSTAT   =0x9A
#byte ADRESL   	=0x9B
#byte ADRESH   	=0x9C
#byte ADCON0   	=0x9D
#byte ADCON1   	=0x9E

#byte LATA	=0x10C


#byte CM1CON0   =0x111
#byte CM1CON1   =0x112

#byte CMOUT     =0x115
#byte BORCON    =0x116
#byte FVRCON    =0x117
#byte DACCON0   =0x118
#byte DACCON1   =0x119
#byte SRCON0    =0x11A
#byte SRCON1    =0x11B

#byte APFCON    =0x11D

#byte ANSELA    =0x18C

#byte EEADRL    =0x191
#byte EEADRH    =0x192
#byte EEDATL    =0x193
#byte EEDATH    =0x194
#byte EECON1    =0x195
#byte EECON2    =0x196
#byte VREGCON   =0x197

#byte RCREG     =0x199
#byte TXREG     =0x19A
#byte SPBRGL    =0x19B
#byte SPBRGH    =0x19C
#byte RCSTA     =0x19D
#byte TXSTA     =0x19E
#byte BAUDCON   =0x19F

#byte WPUA      =0x20C

#byte SSP1BUF   =0x211
#byte SSP1ADD   =0x212
#byte SSP1MASK  =0x213
#byte SSP1STAT  =0x214
#byte SSP1CON1  =0x215
#byte SSP1CON2  =0x216
#byte SSP1CON3  =0x217

#byte CCPR1L    =0x291
#byte CCPR1H    =0x292
#byte CCP1CON   =0x293
#byte PWM1CON   =0x294
#byte CCP1AS    =0x295
#byte PSTR1CON  =0x296

#byte IOCAP     =0x391
#byte IOCAN     =0x392
#byte IOCAF     =0x393

#byte CLKRCON   =0x39A

#byte MDCON   	=0x39C
#byte MDSRC   	=0x39D
#byte MDCARL   	=0x39E
#byte MDCARH   	=0x39F

#byte STATUS_SHAD =0xFE4
#byte WREG_SHAD   =0xFE5
#byte BSR_SHAD    =0xFE6
#byte PCLATH_SHAD =0xFE7
#byte FSR0L_SHAD  =0xFE8
#byte FSR0H_SHAD  =0xFE9
#byte FSR1L_SHAD  =0xFEA
#byte FSR1H_SHAD  =0xFEB

#byte STKPTR  	=0xFED
#byte TOSL    	=0xFEE
#byte TOSH    	=0xFEF


#bit porta5   	=PORTA.5
#bit porta4   	=PORTA.4
#bit porta3   	=PORTA.3
#bit porta2   	=PORTA.2
#bit porta1   	=PORTA.1
#bit porta0   	=PORTA.0

#bit trisa5   	=TRISA.5
#bit trisa4   	=TRISA.4
#bit trisa3   	=TRISA.3
#bit trisa2   	=TRISA.2
#bit trisa1   	=TRISA.1
#bit trisa0   	=TRISA.0

#bit wpua5    	=WPUA.5
#bit wpua4    	=WPUA.4
#bit wpua3    	=WPUA.3
#bit wpua2    	=WPUA.2
#bit wpua1    	=WPUA.1
#bit wpua0    	=WPUA.0


#bit iocif   	=INTCON.0
#bit intf   	=INTCON.1
#bit tmr0if   	=INTCON.2
#bit iocie   	=INTCON.3
#bit inte   	=INTCON.4
#bit tmr0ie   	=INTCON.5
#bit peie   	=INTCON.6
#bit gie   		=INTCON.7

#bit tmr1if   	=PIR1.0
#bit tmr2if   	=PIR1.1
#bit ccp1if   	=PIR1.2
#bit ssp1if   	=PIR1.3
#bit txif   	=PIR1.4
#bit rcif   	=PIR1.5
#bit adif   	=PIR1.6
#bit tmr1gif   	=PIR1.7

#bit bcl1if   	=PIR2.3
#bit eeif   	=PIR2.4
#bit c1if   	=PIR2.5
#bit osfif 		=PIR2.7

#bit tmr1on     =T1CON.0
#bit t1sync_    =T1CON.2
#bit t1oscen    =T1CON.3
#bit t1ckps0    =T1CON.4
#bit t1ckps1    =T1CON.5
#bit tmr1cs0    =T1CON.6
#bit tmr1cs1    =T1CON.7

#bit t1gss0   	=T1GCON.0
#bit t1gss1   	=T1GCON.1
#bit t1gval   	=T1GCON.2
#bit t1ggo   	=T1GCON.3
#bit t1gspm   	=T1GCON.4
#bit t1gtm   	=T1GCON.5
#bit t1gpol   	=T1GCON.6
#bit tmr1ge   	=T1GCON.7

#bit tmr2on   	=T2CON.2

#bit t0xcs   	=CPSCON0.0
#bit cpsout   	=CPSCON0.1
#bit cpsrng0   	=CPSCON0.2
#bit cpsrng1   	=CPSCON0.3
#bit cpsrm   	=CPSCON0.6
#bit cpson   	=CPSCON0.7

#bit tmr1ie   	=PIE1.0
#bit tmr2ie   	=PIE1.1
#bit ccp1ie   	=PIE1.2
#bit ssp1ie   	=PIE1.3
#bit txie   	=PIE1.4
#bit rcie   	=PIE1.5
#bit adie   	=PIE1.6
#bit tmr1gie   	=PIE1.7

#bit bcl1ie		=PIE2.3
#bit eeie   	=PIE2.4
#bit c1ie   	=PIE2.5
#bit osfie   	=PIE2.7

#bit ps0  		=OPTION_REG.0
#bit ps1   		=OPTION_REG.1
#bit ps2   		=OPTION_REG.2
#bit psa   		=OPTION_REG.3
#bit tmr0se   	=OPTION_REG.4
#bit tmr0cs   	=OPTION_REG.5
#bit intedg   	=OPTION_REG.6
#bit wpuen_   	=OPTION_REG.7

#bit bor_   	=PCON.0
#bit por_   	=PCON.1
#bit ri_   		=PCON.2
#bit rmclr_   	=PCON.3
#bit stkunf   	=PCON.6
#bit stkovf   	=PCON.7

#bit swdten   	=WDTCON.0

#bit scs0   	=OSCCON.0
#bit scs1   	=OSCCON.1
#bit spllen   	=OSCCON.7

#bit adon   	=ADCON0.0
#bit adgo   	=ADCON0.1
#bit chs0   	=ADCON0.2
#bit chs1   	=ADCON0.3
#bit chs2   	=ADCON0.4
#bit chs3   	=ADCON0.5
#bit chs4   	=ADCON0.6

#bit adpref0    =ADCON1.0
#bit adpref1    =ADCON1.1
#bit adcs0   	=ADCON1.4
#bit adcs1   	=ADCON1.5
#bit adcs2   	=ADCON1.6
#bit adfm   	=ADCON1.7

#bit lata5   	=LATA.5
#bit lata4   	=LATA.4
#bit lata3   	=LATA.3
#bit lata2   	=LATA.2
#bit lata1   	=LATA.1
#bit lata0   	=LATA.0

#bit c1sync   	=CM1CON0.0
#bit c1hys   	=CM1CON0.1
#bit c1sp   	=CM1CON0.2
#bit c1pol   	=CM1CON0.4
#bit c1oe   	=CM1CON0.5
#bit c1out   	=CM1CON0.6
#bit c1on   	=CM1CON0.7

#bit c1nch0 	=CM1CON1.0
#bit c1pch0   	=CM1CON1.4
#bit c1pch1   	=CM1CON1.5
#bit c1intn   	=CM1CON1.6
#bit c1intp   	=CM1CON1.7

#bit mc1out   	=CMOUT.0

#bit borrdy   	=BORCON.0
#bit sboren   	=BORCON.7

#bit adfvr0   	=FVRCON.0
#bit adfvr1   	=FVRCON.1
#bit cdafvr0   	=FVRCON.2
#bit cdafvr1   	=FVRCON.3
#bit tsrng		=FVRCON.4
#bit tsen		=FVRCON.5
#bit fvrrdy   	=FVRCON.6
#bit fvren   	=FVRCON.7

#bit dacpss0   	=DACCON0.2
#bit dacpss1   	=DACCON0.3
#bit dacoe   	=DACCON0.5
#bit daclps   	=DACCON0.6
#bit dacen   	=DACCON0.7

#bit srpr   	=SRCON0.0
#bit srps   	=SRCON0.1
#bit srnqen   	=SRCON0.2
#bit srqen   	=SRCON0.3
#bit srclk0   	=SRCON0.4
#bit srclk1   	=SRCON0.5
#bit srclk2   	=SRCON0.6
#bit srlen   	=SRCON0.7

#bit srrc1e   	=SRCON1.0
#bit srrcke   	=SRCON1.2
#bit srrpe   	=SRCON1.3
#bit srsc1e   	=SRCON1.4
#bit srscke   	=SRCON1.6
#bit srspe   	=SRCON1.7

#bit ansa4  	=ANSELA.4
#bit ansa2  	=ANSELA.2
#bit ansa1  	=ANSELA.1
#bit ansa0  	=ANSELA.0

#bit ccp1sel   	=APFCON.0
#bit p1bsel   	=APFCON.1
#bit txcksel   	=APFCON.2
#bit t1gsel   	=APFCON.3
#bit sssel   	=APFCON.5
#bit sdosel   	=APFCON.6
#bit rxdtsel   	=APFCON.7

#bit rd   	    =EECON1.0
#bit wr   		=EECON1.1
#bit wren   	=EECON1.2
#bit wrerr   	=EECON1.3
#bit free   	=EECON1.4
#bit lwlo   	=EECON1.5
#bit cfgs   	=EECON1.6
#bit eepgd   	=EECON1.7

#bit vregpm     =VREGCON.1

#bit rx9d   	=RCSTA.0
#bit oerr   	=RCSTA.1
#bit ferr   	=RCSTA.2
#bit adden   	=RCSTA.3
#bit cren   	=RCSTA.4
#bit sren   	=RCSTA.5
#bit rx9   		=RCSTA.6
#bit spen   	=RCSTA.7

#bit tx9d   	=TXSTA.0
#bit trmt   	=TXSTA.1
#bit brgh   	=TXSTA.2
#bit sendb   	=TXSTA.3
#bit sync   	=TXSTA.4
#bit txen   	=TXSTA.5
#bit tx9   		=TXSTA.6
#bit csrc   	=TXSTA.7

#bit abden   	=BAUDCON.0
#bit wue   		=BAUDCON.1
#bit brg16   	=BAUDCON.3
#bit sckp   	=BAUDCON.4
#bit rcidl   	=BAUDCON.6
#bit abdovf   	=BAUDCON.7

#bit bf   		=SSP1STAT.0
#bit ua   		=SSP1STAT.1
#bit rw_   		=SSP1STAT.2
#bit s   		=SSP1STAT.3
#bit p   		=SSP1STAT.4
#bit da_   		=SSP1STAT.5
#bit cke   		=SSP1STAT.6
#bit smp   		=SSP1STAT.7

#bit sspm0   	=SSP1CON1.0
#bit sspm1   	=SSP1CON1.1
#bit sspm2   	=SSP1CON1.2
#bit sspm3   	=SSP1CON1.3
#bit ckp   		=SSP1CON1.4
#bit sspen   	=SSP1CON1.5
#bit sspov   	=SSP1CON1.6
#bit wcol   	=SSP1CON1.7

#bit sen   		=SSP1CON2.0
#bit rsen   	=SSP1CON2.1
#bit pen   		=SSP1CON2.2
#bit rcen   	=SSP1CON2.3
#bit acken   	=SSP1CON2.4
#bit ackdt   	=SSP1CON2.5
#bit ackstat   	=SSP1CON2.6
#bit gcen   	=SSP1CON2.7

#bit dhen   	=SSP1CON3.0
#bit ahen   	=SSP1CON3.1
#bit sbcde   	=SSP1CON3.2
#bit sdaht   	=SSP1CON3.3
#bit boen   	=SSP1CON3.4
#bit scie   	=SSP1CON3.5
#bit pcie   	=SSP1CON3.6
#bit acktim   	=SSP1CON3.7

#bit ccp1m0   	=CCP1CON.0
#bit ccp1m1   	=CCP1CON.1
#bit ccp1m2   	=CCP1CON.2
#bit ccp1m3   	=CCP1CON.3
#bit dc1b0   	=CCP1CON.4
#bit dc1b1   	=CCP1CON.5
#bit p1m0   	=CCP1CON.6
#bit p1m1   	=CCP1CON.7

#bit p1rsen   	=PWM1CON.7
#bit p1dc6   	=PWM1CON.6
#bit p1dc5   	=PWM1CON.5
#bit p1dc4   	=PWM1CON.4
#bit p1dc3   	=PWM1CON.3
#bit p1dc2   	=PWM1CON.2
#bit p1dc1   	=PWM1CON.1
#bit p1dc0   	=PWM1CON.0

#bit pss1bd0   	=CCP1AS.0
#bit pss1bd1   	=CCP1AS.1
#bit pss1ac0   	=CCP1AS.2
#bit pss1ac1   	=CCP1AS.3
#bit ccp1as0   	=CCP1AS.4
#bit ccp1as1   	=CCP1AS.5
#bit ccp1as2   	=CCP1AS.6
#bit ccp1ase   	=CCP1AS.7

#bit str1a   	=PSTR1CON.0
#bit str1b   	=PSTR1CON.1

#bit str1sync   =PSTR1CON.4

#bit clkrdiv0   =CLKRCON.0
#bit clkrdiv1   =CLKRCON.1
#bit clkrdiv2   =CLKRCON.2
#bit clkrdc0   	=CLKRCON.3
#bit clkrdc1   	=CLKRCON.4
#bit clkrslr   	=CLKRCON.5
#bit clkroe   	=CLKRCON.6
#bit clkren   	=CLKRCON.7

#bit mdbit   	=MDCON.0
#bit mdout   	=MDCON.3
#bit mdopol   	=MDCON.4
#bit mdslr   	=MDCON.5
#bit mdoe   	=MDCON.6
#bit mden   	=MDCON.7

#bit mdms0   	=MDSRC.0
#bit mdms1   	=MDSRC.1
#bit mdms2   	=MDSRC.2
#bit mdms3   	=MDSRC.3
#bit mdmsodis   =MDSRC.7

#bit mdcl0   	=MDCARL.0
#bit mdcl1   	=MDCARL.1
#bit mdcl2   	=MDCARL.2
#bit mdcl3   	=MDCARL.3
#bit mdclsync   =MDCARL.5
#bit mdclpol   	=MDCARL.6
#bit mdclodis   =MDCARL.7

#bit mdch0   	=MDCARH.0
#bit mdch1   	=MDCARH.1
#bit mdch2   	=MDCARH.2
#bit mdch3   	=MDCARH.3
#bit mdchsync   =MDCARH.5
#bit mdchpol   	=MDCARH.6
#bit mdchodis   =MDCARH.7

#bit c_shad   	=STATUS_SHAD.0
#bit dc_shad  	=STATUS_SHAD.1
#bit z_shad   	=STATUS_SHAD.2